The present invention relates to integrated circuit (IC) packaging, and more particularly, to protective encapsulation of a die used in a ball grid array (BGA) or a similar IC package.
The most readily available form of semiconductor die products are termed “bare die.” Typically, such bare dies are produced in relatively large batches using wafers of electronics-grade silicon or other suitable semiconductor material(s) through a multi-step sequence of photolithographic and chemical processing steps, during which integrated circuits are gradually created on the wafer. Each wafer is then cut (“diced”) into many pieces (dies), each containing a respective copy of the functional circuit that is being fabricated.
Many IC manufacturers purchase or fabricate bare dies and then package them in a particular manner to produce packaged IC devices that meet customer specifications. A conventional bare-die packaging process may include the steps of (i) mounting a die on an interconnecting substrate, such as a redistribution layer (RDL), an interposer, or a lead frame, and bonding or mechanically attaching the die to the interconnecting substrate; (iii) wire bonding the die to electrically connect it to the interconnecting substrate; and (iv) encapsulating the die in a protective molding compound.
In the bare-die packaging process, the wire bonding and encapsulating steps are substantially the rate-limiting steps of the manufacturing process. As such, improvements to the conventional bare-die packaging processes are desirable, e.g., to increase the throughput of the production line.